Pattern Rule Examples

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Pattern rule examples

The following are some examples of pattern rules actually predefined in make. First, the rule that compiles ‘.c’ files into ‘.o’ files:

%.o : %.c
$(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@

defines a rule that can make any file ‘x.o’ from ‘x.c’. The command uses the automatic variables ‘$@’ and ‘$<’ to substitute the names of the target file and the source file in each case where the rule applies (see Automatic variables).

The following is a second built-in rule:

% :: RCS/%,v
$(CO) $(COFLAGS) $<

This statement defines a rule that can make any file ‘x’ whatsoever from a corresponding file ‘x,v’ in the subdirectory ‘RCS’. Since the target is ‘%’, this rule will apply to any file whatever, provided the appropriate dependency file exists. The double colon makes the rule terminal, meaning that its dependency may not be an intermediate file (see Match-anything pattern rules).

The following pattern rule has two targets:

%.tab.c %.tab.h: %.y
bison -d $<

This tells make that the command ‘bison -dx.y’ will make both ‘x.tab.c’ and ‘x.tab.h’. If the file ‘foo’ depends on the files ‘parse.tab.o’ and ‘scan.o’ and the file ‘scan.o’ depends on the file ‘parse.tab.h’, when ‘parse.y’ is changed, the command ‘bison -d parse.y’ will be executed only once, and the dependencies of both ‘parse.tab.o’ and ‘scan.o’ will be satisfied. (Presumably the file ‘parse.tab.o’ will be recompiled from ‘parse.tab.c’ and the file ‘scan.o’ from ‘scan.c’, while ‘foo’ is linked from ‘parse.tab.o’, ‘scan.o’, and its other dependencies, and it will execute happily ever after.)

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