Assemble in MRI Compatibility Mode: -M

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Assemble in MRI compatibility mode: -M

The -M or --mri option selects MRI compatibility mode. This changes the syntax and pseudo-op handling of as to make it compatible with the ASM68K or the ASM960 (depending upon the configured target) assembler from Microtec Research.

The exact nature of the MRI syntax will not be documented; see the MRI manuals for more information. The purpose of this option is to permit assembling existing MRI assembler code using as.

The MRI compatibility is not complete.

Certain operations of the MRI assembler depend upon its object file format, and can not be supported using other object file formats.

Supporting these would require enhancing each object file format individually. These are the following.

- global symbols in common section
The Motorola 68k MRI assembler supports common sections which are merged by the linker. Other object file formats do not support this. as handles common sections by treating them as a single common symbol.
It permits local symbols to be defined within a common section, but it can not support global symbols, since it has no way to describe them.
- complex relocations
The MRI assemblers support relocations against a negated section address, and relocations which combine the start addresses of two or more sections. These are not support by other object file formats.
- END pseudo-op specifying start address
The MRI END pseudo-op permits the specification of a start address. This is not supported by other object file formats. The start address may instead be specified using the -e option to the linker, or in a linker script.
- IDNT, .ident and NAME pseudo-ops
The MRI IDNT, .ident and NAME pseudo-ops assign a module name to the output file. This is not supported by other object file formats.
- ORG pseudo-op
The Motorola 68k MRI ORG pseudo-op begins an absolute section at a given address. This differs from the usual as .org pseudo-op, which changes the location within the current section. Absolute sections are not supported by other object file formats. The address of a section may be assigned within a linker script.

There are some other features of the MRI assembler which are not supported by as, typically either because they are difficult or because they seem of little consequence. Some of these may be supported in future releases. These are the following.

- EBCDIC strings
EBCDIC strings are not supported.
- packed binary coded decimal
Packed binary coded decimal is not supported. This means that the DC.P and DCB.P pseudo-ops are not supported.
- FEQU pseudo-op
The Motorola 68k FEQU pseudo-op is not supported.
- NOOBJ pseudo-op
The Motorola 68k NOOBJ pseudo-op is not supported.
- OPT branch control options
The Motorola 68k OPT branch control options—B, BRS, BRB, BRL, and BRW— are ignored. as automatically relaxes all branches, whether forward or backward, to an appropriate size, so these options serve no purpose.
- OPT list control options
The following m68k OPT list control options are ignored: C, CEX, CL, CRE, E, G, I, M, MEX, MC, MD, X.
- other OPT options
The following Motorola 68k OPT options are ignored: NEST, O, OLD, OP, P, PCO, PCR, PCS, R.
- OPT D option is default
The Motorola 68k OPT D option is the default, unlike the MRI assembler. OPT NOD may be used to turn it off.
- XREF pseudo-op.
The Motorola 68k XREF pseudo-op is ignored.
- .debug pseudo-op
The Intel i960 .debug pseudo-op is not supported.
- .extended pseudo-op
The Intel i960 .extended pseudo-op is not supported.
- .list pseudo-op.
The various options of the Intel i960 .list pseudo-op are not supported.
- .optimize pseudo-op
The Intel i960 .optimize pseudo-op is not supported.
- .output pseudo-op
The Intel i960 .output pseudo-op is not supported.
- .setreal pseudo-op
The Intel i960 .setreal pseudo-op is not supported.

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